Datacenters provide the infrastructure backbone necessary to support big data analytics and cloud services, which are increasingly employed to tackle a diverse set of grand challenges. But datacenter power consumption is growing at an unsustainable pace. In order to keep up with the hyperscale growth in datacenter demand, it is imperative that datacenters become more energy efficient. Servers, the largest power consumer in datacenters, are optimized for high energy efficiency only at peak and idle load, but rarely operate in that region. Therefore, there is a need for energy proportional computing, where servers consume power in proportion to their utilization. How to achieve or surpass ideal energy proportionality is the focus of this talk. Toward this goal, I will first present a historical trend analysis of energy proportionality, using novel metrics, in order to identify opportunities for proportionality improvements. Second, I will present KnightShift, a heterogeneous server architecture that tightly couples a low-power Knight node with a high-power primary server, which achieves near-ideal energy proportionality. Finally, I will present the implications of high energy proportional servers on cluster-level energy proportionality. We find that traditional cluster-level energy proportionality techniques may actually limit cluster-wide energy proportionality, and it may now be more beneficial to depend solely on server-level low power techniques such as KnightShift; a finding that is a major departure from conventional wisdom. Daniel Wong is a PhD candidate in Electrical Engineering at the University of Southern California. His research focuses on energy efficient design of computer systems, from data center scale to micro-architecture scale, through cross-stack solutions spanning from circuits to runtime systems. His research has been recognized as one of IEEE Micro?s Top Picks in Computer Architecture for 2013. He held research internship positions at Samsung Semiconductor, Inc. and Lawrence Livermore National Lab. He earned his MS in Electrical Engineering in 2011, and BS in Computer Engineering and Computer Science in 2009, both from the University of Southern California. More information can be found at http://www.danielwong.org.

As electronic devices become increasingly interconnected and pervasive in people's lives, security, trustworthy computing, and privacy protection have notably emerged as important challenges for the next decade. The assumption that hardware is trustworthy and that security effort should only be focused on networks and software is no longer valid given globalization of integrated circuits (ICs) and systems design and fabrication. The design of secure hardware ICs requires novel approaches for authentication that are based on multiple factors that is difficult to compromise. Equally important is the need for protecting intellectual property and design of integrated circuits that are harder to reverse engineer. In this talk, I will explore both of the authentication-based and obfuscation-based hardware protection approaches. One popular technique of authentication-based protection is Physical Unclonable Functions (PUFs) which provide a hardware specific unique signature or identification. I will provide an overview of the reconfigurable PUF structures and circuits that could achieve higher security. Next, I will present a novel low-overhead solution to design Digital Signal Processing (DSP) circuits that are obfuscated both structurally and functionally by utilizing high-level transformation techniques. Finally, I will describe the theme of my future research: security, randomness, and computing. Yingjie Lao, PhD candidate at University of Minnesota,

Hopefully your semester is off to a good start. Just a reminder that we will have our first meeting tomorrow night at 6:00pm in 3A75 (Swearingen). It will be a great opportunity to learn about summer internships! More info at their Facebook Group.

Hi everyone! We are getting ready to kick off the semester with our first meeting this Wednesday, January 21st at 5 pm. The main focus for this meeting will be getting a list of our members so we can submit the names to the national ACM organization. If you cannot come to the meeting, please send me your name, email address, and please indicate if you are a national ACM member. Thank you! See here for details.

DISSERTATION DEFENSE Department of Computer Science and Engineering University of South Carolina Candidate: Ibrahim Savran Advisor: Dr. John Rose Date: Wednesday, December 3, 2014 Time: 2:00pm Place: Swearingen (1A03, Faculty Lounge) Computational Genomics, or Computational Genetics, refers to the use of computational and statistical analysis for understanding the structure and the function of genetic material in organisms. The primary focus of research in computational genomics in the past three decades has been the understanding of genomes and their functional elements by analyzing biological sequence data. The high demand for low-cost sequencing has driven the development of high- throughput sequencing technologies, next-generation sequencing (NGS), that parallelize the sequencing process, producing thousands or millions of sequences concurrently. Moore's Law is the observation that the number of transistors on integrated circuits doubles approximately every two years; correspondingly, the cost per transistor halves. The cost of DNA sequencing declines much faster, which implies more new DNA data will be obtained. This large-scale sequence data, produced with high throughput sequencing technologies, needs to be processed in a time-effective and cost-effective manner. In this dissertation, we present a high-performance meta-genome gene identification framework. This framework includes four modules: filter alignment, error correction, and gene identification. The following chapters describe the proposed design and evaluation of this pipeline. The most computationally expensive kernel in the framework is the alignment procedure. Thus, the filter module is developed to determine unnecessary alignment operations. Without the filter module, the alignment module requires 1.9 hours to complete all-to-all alignment on a test file of size 512,000 sequences with each sequence average length 750 base pairs by using ten Kepler K20 NVIDIA GPU. On the other hand, when combined with the filter kernel, the total time is 11.3 minutes. Note that the ideal speedup is nearly 91.4 times faster when new alignment kernel is run on ten GPUs (10*9.14). We conclude that accuracy can be achieved at the expense of more resources while operating frequency can still be maintained.

COLLOQUIUM Tian He Department of Computer Science and Engineering University of Minnesota Date: November 21 Time: 1530-1630 (3:30-4:30pm) Place: Swearingen 1A03 (Faculty Lounge) Abstract For decades, many researchers have been focusing on wireless networks in which devices are assumed to be ready to receive incoming packets, ignoring the fact that idle listening dominates energy consumption, especially in emerging low-rate low-power wireless transceivers (e.g., 802.15.4). To reduce the energy costs of idle listening, a device must reduce its duty-cycle by sampling RF channels very briefly and shutting down for long periods. At any given time, this type of network is actually fragmented and network connectivity becomes intermittent, wherein a sender suffers sleep latency, i.e., a delay waiting for an intended receiver to wake up. With the increasing gap between the long lifetime requirements and slow progress in battery technology, low-duty-cycle networking is a crucial future foundation for many energy-constrained wireless applications (e.g., low-power sensing, actuation, tagging and alert). However, the little research that has been done in this area predominately focuses on individual physical designs and the need for network-level research becomes increasing important. This talk introduces the latest development in low-duty-cycle networking research with the focus on how to optimize networking performance (e.g., delay, reliability, and cost) in the presence of sleep latency, unreliable links and dynamic energy availability. Dr. Tian He is currently an associate professor in the Department of Computer Science and Engineering at the University of Minnesota-Twin City. Dr. He is the author and co-author of over 150 papers in premier wireless network journals and conferences with over 14,000 citations (h-index 48). Dr. He is the recipient of the NSF CAREER Award, McKnight Land-Grant Professorship and five best paper awards. Dr. He served as general or program chair positions in several international conferences and on many program committees. He currently serves as an editorial board member for six international journals including ACM Transactions on Sensor Networks and IEEE Transaction on Computers. His research includes wireless sensor networks, intelligent transportation systems, real-time embedded systems and distributed systems, supported by the National Science Foundation, IBM, Microsoft and other agencies and corporations.

Interested in the future implications of Artificial Intelligence? Enjoy a good philosophical and scientific discussion? Come to ASBMB's Science and Philosophy event "Artificial Intelligence - Will the Machines Take Over?", discussing the future implications of Artificial Intelligence from many different viewpoints! The event will feature a panel of professors from many different disciplines; Dr. Michael Huhns and Dr. Marco Valtorta of the Computer Science and Engineering Departments, Dr. Susan Vanderborg of the English Department, Dr. Joseph November of the History Department, and Dr. Michael Dickson - the department chair of the Philosophy Department. The event will be at 7 pm on November 17th (NEXT MONDAY), in Honors Residence Hall B111. All majors are welcome, and refreshments will be served!