The iCAS lab, directed by Dr. Ramtin Zand, won the first-place award at the 2024 University Demonstration at DAC, The Chips to Systems Conference for the project titled "HiRISE: High-Resolution Image Scaling for Edge ML via In-Sensor Compression and Selective ROI."

Demo by: Brendan Reidy and Peyton Chandarana, Ph.D. Research Assistants

Project Description: With the rise of tiny IoT devices powered by machine learning (ML), many researchers have directed their focus toward compressing models to fit on tiny edge devices. Recent works have achieved remarkable success in compressing ML models for object detection and image classification on microcontrollers with small memory, e.g., 512kB SRAM. However, there remain many challenges prohibiting the deployment of ML systems that require high-resolution images. Due to fundamental limits in memory capacity for tiny IoT devices, it may be physically impossible to store large images without external hardware. To this end, we propose a high-resolution image scaling system for edge ML, called HiRISE, which is equipped with selective region-of-interest (ROI) capability leveraging analog in-sensor image scaling. Our methodology not only significantly reduces the peak memory requirements, but also achieves up to 17.7x reduction in data transfer and energy consumption.

Paper Authors: Brendan Reidy, Sepehr Tabrizchi, MohammadReza Mohammadi, Shaahin Angizi, Arman Roohi, and Ramtin Zand