A runtime-adaptive transformer neural network accelerator on FPGAs
Microprocessors and Microsystems, Volume 120, 2026, 105223, ISSN 0141-9331
Publications
2026
2025
DA-VinCi: A Deep-Learning Accelerator Overlay Using In-Memory Computing
ACM Transactions of Reconfigurable Technology and Systems (TRETS), Vol. 18, No. 4, November 2025.
A Decomposition-Based Memristive Crossbar Solver and FPGA-Accelerated Hardware Implementation
Proc. 35th Great Lakes Symposium on VLSI (GLSVLSI 2025)
CrossNAS: A Cross-Layer Neural Architecture Search Framework for PIM Systems
Proc. 35th Great Lakes Symposium on VLSI (GLSVLSI 2025)
N-TORC: Native Tensor Optimizer for Real-time Constraints
Proc. 33rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2025)
Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms
Proc. 33rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2025)
Resource Scheduling for Real-Time Machine Learning
Proc. 33rd IEEE International Symposium on Field-Programmable Gate Arrays (FPGA 2025)
2024
ProTEA: Programmable Transformer Encoder Acceleration on FPGA
Proc. 10th Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC 2024) at ACM/IEEE Supercomputing 2024
IMAGine: An In-Memory Accelerated GEMV Engine Overlay
Proc. 34th International Conference on Field-Programmable Logic and Applications (FPL 2024)
Embedded Systems: ARM Programming and Optimization 2nd Edition
Elsevier, 2024 (textbook).
2023
Multi-modal generative adversarial networks for synthesizing time-series structural impact responses
Mechanical Systems and Signal Processing
Optimal Sampling Methodologies for High-rate Structural Twinning
Proc. 26th International Conference on Information Fusion, Jun. 27-30, 2023 (FUSION 2023).
Accelerating LSTM-based High-Rate Dynamic System Models
33rd International Conference on Field Programmable Logic and Applications (FPL 2023)
FPGA Processor In Memory Architectures (PIMs) Overlay or Overhaul?
33rd International Conference on Field Programmable Logic and Applications (FPL 2023)
Making BRAMs Compute Creating Scalable Computational Memory Fabric Overlays
Proc. 31st IEEE International Symposium On Field-Programmable Custom Computing (FCCM 2023).
NAPOLY: A Non-deterministic Automata Processor OverLaY
ACM Transactions of Reconfigurable Technology and Systems (TRETS)
Real-time structural model updating using local eigenvalue modification procedure for applications in high-rate dynamic events
Mechanical Systems and Signal Processing
2022
Progress Towards Data-Driven High-Rate Structural State Estimation on Edge Computing Devices
In Volume 10 34th Conference on Mechanical Vibration and Sound (VIB). American Society of Mechanical Engineers, aug 2022. doi 10.1115/detc2022-90118.
High-Rate Machine Learning for Forecasting Time-Series Signals
Proc. 30th IEEE International Conference on Field Programmable Custom Computing Machines (FCCM 2022).
Audio-based wildfire detection on embedded systems
MDPI Electronics, 11(9), 2022, doi:10.3390/electronics11091417.
Development of a real-time solver for the local eigenvalue modification procedure
Sensors and Smart Structures Technologies for Civil, Mechanical, and Aerospace Systems 2022. SPIE, Apr 2022. doi:10.1117/12.2613208.
Deterministic and low-latency time-series forecasting of nonstationary signals
Active and Passive Smart Structures and Integrated Systems XVI. SPIE, apr 2022. doi:10.1117/12.2629025.
Compensation technique for accurate acceleration measurements using a UAV deployable and retrievable sensor package
Sensors and Smart Structures Technologies for Civil, Mechanical, and Aerospace Systems 2022. SPIE, apr 2022. doi:10.1117/12.2612945.
Synthesizing Dynamic Time-series Data for Structures Under Shock Using Generative Adversarial Networks
Data Science in Engineering, Volume 10, 2022.
2021
Real-time Forecasting of Vibrations with Nonstationarities
Proceedings of the 39th IMAC, A Conference and Exposition on Structural Dynamics 2021, Springer International Publishing, p. 21-29, Oct 2021. Feb 2021, doi:10.1007/978-3-030-76004-5_4.
Time Series Forecasting for Structures Subjected to Nonstationary Inputs
Proceedings of the ASME 2021 Conference on Smart Materials, Adaptive Structures and Intelligent Systems (SMASIS 2021), doi:10.1115/SMASIS2021-68338.
2019
An Overlay Architecture for Pattern Matching
Proc. 30th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2019).
OpenVX Graph Optimization for Visual Processor Units
Proc. 30th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2019).
2018
Fast Coordination of Power Electronic Converters for Energy Routing in Shipboard Power Systems
Proc. 2018 International Ship Control Systems Symposium (iSCSS 2018).
2017
A Dynamically Reconfigurable Automata Processor Overlay
Proc. International Conference on Reconfigurable Computing and FPGAs 2017 (ReConFig 2017).
Control System Communication Architecture for Power Electronic Building Blocks
Proc. IEEE Electric Ship Technologies Symposium 2017 (ESTS 2017).
System-Level, FPGA-Based, Real-Time Simulation of Ship Power Systems
IEEE Trans. on Energy Conversion Systems, Vol. 32, No. 2., June 2017.
2016
High-Level Synthesis of a Genomic Database Search Engine
Proc. 2016 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2016).
Two-Hit Filter Synthesis for Genomic Database Search
Proc. 24th IEEE International Symposium on Field-Programmable Custom Computing Machines.
2015
Embedded Systems: ARM Programming and Optimization
Elsevier, 2015 (textbook).
Memory Interface Design for 3D Stencil Kernels on a Massively Parallel Memory System
ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 8, Issue 4, 2015.
2014
Sparse Matrix-Vector Multiply on the Keystone II Digital Signal Processor
Proc. 18th Annual IEEE High Performance Extreme Computing Conference (HPEC 2014), Sept. 2014.
Lucas-Kanade Optical Flow Estimation on the TI C66x Digital Signal Processor
Proc. 18th Annual IEEE High Performance Extreme Computing Conference (HPEC 2014), Sept. 2014.
Large-scale Pairwise Sequence Alignments on a Large-scale GPU Cluster
IEEE Design and Test, January/February 2014.
2013
Accuracy, Cost, and Performance Tradeoffs for Floating-Point Accumulation
Proc. 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2013).
Sparse Matrix-Vector Multiply on the Texas Instruments C6678 Digital Signal Processor
Proc. The 24th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2013), Washington D.C., June 5-7, 2013.
Memory Access Scheduling on the Convey HC-1
Proc. The 21st IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM'13), Seattle, Washington, April 28-30, 2013.
Accelerating Frequent Itemset Mining on Graphics Processing Units
Journal of Supercomputing, February 2013, DOI 10.1007/s11227-013-0887-x.
A Heuristic Scheduler for Port-Constrained Floating-Point Pipelines
International Journal of Reconfigurable Computing, Vol. 2013, Article ID 849545, 9 pages, 2013. doi:10.1155/2013/849545.
Extending the BEAGLE Library to a Multi-FPGA Platform
BMC Bioinformatics, BMC Bioinformatics 2013, 14:25.
An FPGA-Based Accelerator for Frequent Itemset Mining
ACM Trans. Reconfigurable Technology and Systems (TRETS), Vol. 6, Issue 1, May 2013.
2012
GPU Acceleration of Pyrosequencing Noise Removal
Proc. 2012 Symposium on Application Accelerators in High Performance Computing (SAAHPC 2012), Argonne National Laboratory, July 10-11, 2012.
A Cluster-on-a-Chip Architecture for High-Throughout Phylogeny Search
IEEE Trans. on Parallel and Distributed Systems, Vol. 23, No. 4, April 2012.
2011
Frequent Itemset Mining on Large-Scale Shared Memory Machines
Proc. IEEE International Conference on Cluster Computing (CLUSTER 2011), Sept. 26-30, 2011.
GPApriori: GPU-Accelerated Frequent Itemset Mining
Proc. IEEE International Conference on Cluster Computing (CLUSTER 2011), Sept. 26-30, 2011.
A Sparse Matrix Personality for the Convey HC-1
Proc. 19th Annual IEEE International Symposium on Field Programmable Custom Computing Machines (FCCM'11), May 1-3, 2011.
2010
High-Performance Heterogeneous Computing with the Convey HC-1
Computing in Science and Engineering, Vol. 12, No. 6, November/December 2010.
Integrated Circuit Implementation for a GaN HFET Driver Circuit
IEEE Transactions on Industry Applications, Vol. 46, No. 5, Sept/Oct. 2010.
GPU Acceleration of Near-Minimal Logic Minimization
Proc. 2010 Symposium on Application Accelerators in High Performance Computing (SAAHPC'10), July 13-15, 2010.
FPGA acceleration of the phylogenetic likelihood function for Bayesian MCMC inference methods
BMC Bioinformatics 2010, 11:184.
2009
A High-Performance Double Precision Accumulator
Proc. IEEE International Conference on Field-Programmable Technology (IC-FPT'09), Dec. 9-11, 2009.
FPGA vs. GPU for Sparse Matrix Vector Multiply
Proc. IEEE International Conference on Field-Programmable Technology (IC-FPT'09), Dec. 9-11, 2009.
An Integrated Reduction Technique for a Double Precision Accumulator
Proc. Third International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA'09), held in conjunction with Supercomputing 2009 (SC'09), Nov. 15, 2009.
Exploiting Matrix Symmetry to Improve FPGA-Accelerated Conjugate Gradient
Proc. 17th Annual IEEE International Symposium on Field Programmable Custom Computing Machines (FCCM'09), April 5-8, 2009.
2008
A Special-Purpose Architecture for Solving the Breakpoint Median Problem
Proc. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 16, No. 12, Dec. 2008.
Integrated Circuit Implementation for a GaN HFETs Driver Circuit
Proc. IEEE Applied Power Electronics Conference and Exposition (APEC'08), Austin, TX, Feb. 24-28, 2008.
2007
FPGA Acceleration of Phylogeny Reconstruction for Whole Genome Data
Proc. 7th IEEE International Symposium on Bioinformatics & Bioengineering (BIBE'07), Boston, MA, 14-17 Oct. 2007.
FPGA Acceleration of Gene Rearrangement Analysis
Proc. 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'07), April 23-25, 2007.
Lightweight Error Correction Coding for System-Level Interconnects
IEEE Transactions on Computers, Vol. 56, No. 3, March 2007.
2006
Predictive Load Balancing for Interconnected FPGAs
Proc. 16th International Conference on Field Programmable Logic and Applications (FPL'06), Madrid, Spain, August 28-30, 2006.
A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism
Proc. 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), April 24-26, 2006.
Efficient Optical Communications Using Multibit Differential Signaling
Proc. SPIE Symposium on Optoelectronics, Photonics West: Photonics Packaging and Integration VIII, Paper No. 6126-16, San Jose, CA, 21-26 January 2006.
2005
Area, Power, and Pin Efficient Bus Transceiver Using Multi-Bit-Differential Signaling
Proc. IEEE International Symposium on Circuits and Systems (ISCAS'05), pp. 1662 - 1665 Vol. 2, Kobe, Japan, May 23-26, 2005.
Area, power, and pin efficient bus structures using multi-bit-differential signaling
Proc. SPIE Symposium on Microtechnologies for the New Millennium 2005, pp. 5837-04, VLSI Circuits and Systems II, 5837-4, Sevilla, Spain, May 9-11, 2005.
Power Efficient Communication Using Multi-Bit-Differential Signaling
Proc. IEEE/LEOS 16th Annual Workshop on Interconnections within High-Speed Digital Systems, Santa Fe, NM, May 8-11, 2005.
2004
Active Substrates for Optoelectronic Interconnect
Proc. IEEE International Symposium on Circuits and Systems (ISCAS'04), Volume 5, pp. V-592 - V-595, Vancouver, Canada, May 23-26, 2004.
Photonic Packaging for Mixed-Technology Sensor Systems
Topical Meeting on Optics in Computing, European Optical Society (OC'04), Integrated Photonics Research and Optics in Computing (IPR-OiC'2004), pp. 113-114, Engelberg, Switzerland, April 21-23, 2004.
Modeling and Simulation of Fiber Image Guide Multi-Chip Modules for MOEMS Applications
Proc. SPIE Photonics West: Micromachining and Microfabrication/MOEMS and Miniaturized Systems IV, Vol. 5346-18, pp. 141-150, San Jose, CA, 25-30 January 2004.
2003
Optoelectronic Multi-Chip Module Demonstrator System
in Optics in Computing, OSA Technical Digest, (Optical Society of America, Washington DC, 2003) pp 117-119.
Optoelectronic Multi-Chip Modules
Proc. 10th Annual Conference of Mixed Design of Integrated Circuits and Systems (MIXDES'03), Lodz, Poland, June 26-28, 2003.
Encoding Benefits for Fast Optical Transceivers
Proc. 14th IEEE-LEOS Annual Workshop on Interconnections within High-Speed Digital Systems, Santa Fe, New Mexico, 4 - 7 May 2003.
2002
Optoelectronic Multi-Chip-Module Implementation of a 64 Channel Crossbar Switch
Proc. International Conference of Optics in Computing (OC'02) pp. 161-163, Taipei, Taiwan, April 8 - 11, 2002.