Data Analysis, Computer Vision, and Machine Learning for DOE-3013 Plutonium Canister Corrosion Surveillance (2019-2026)

This project will develop machine learning tools to screen microscopy imagery to detect corrosion-driven penetrations within the Inner Canister Closure Weld Region of the DOE-3013 plutonium storage containers, scanned with destructive testing

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Collaborative Research:SHF:Medium:Machine Learning on the Edge for Real-Time Microsecond State Estimation of High-Rate Dynamic Events (2020-2026)

This project addresses two distinct but synergistic problems: (1) technologies to enable real-time decision-making and control of active structures that experience dynamic events at the microsecond timescale and (2) development of tools for optimization and synthesis of domain-specific processors for trained models.

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LEAP-HI: A Data-Driven Fragility Framework for Risk Assessment of Levee Breach (2022-2027)

This project will address uncertainties in levee performance and levee breach flooding through a convergent approach that integrates smart sensing of geotechnical and hydraulic parameters with probabilistic and deterministic modeling of levee failure and inundation of levee-protected floodplains.

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Collaborative Research: SHF: Small: Sub-millisecond Topological Feature Extractor for High-Rate Machine Learning (2023-2027)

This project will demonstrate that complex nonstationary systems can be learned in real-time by integrating modern mathematical tools combined with advances in hardware, notably by generating a field-programmable gate array design for a real-time predictor running on the edge.

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SHF: Small: Cross-Layer Design Automation for In-Memory Analog Computing (2024-2027)

The project spans various layers of design abstraction, encompassing circuit, architecture, and computer-aided design tools. It addresses several critical aspects, including (1) the development of a novel in-memory analog computing (IMAC) architecture that realizes both matrix multiplication and nonlinear vector operations in the analog domain, (2) the design of a hierarchical analog network-on-chip to support the deployment of large ML workloads on IMAC architecture with minimal need for signal conversion from the analog domain to digital and vice versa, (3) heterogeneous integration of IMAC with existing ML hardware platforms enabling fine-grained function mapping of targeted applications on the developed heterogeneous systems, and (4) development of a fast and accurate simulation framework, incorporating lightweight solvers specifically designed to solve the nodal conductance matrices of memristive crossbars in IMAC architecture.

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