COLLOQUIUM
Department of Computer Science and Engineering
University of South Carolina
 
Leveraging Configurability
in the System Design Process

Lesley Shannon

Department of Electrical and Computer Engineering
University of Toronto

Date: February 20, 2006
Time: 1325-1425
Place: Swearingen 1A03 (Faculty Lounge)

Abstract

The focus of this research is to try to reduce the design time of
embedded computing systems by leveraging configurability during the
design process.  One method we have explored is to use an SRAM-based
FPGA, which can be reprogrammed at no cost to the designer, as the
system implementation platform.  This allows designers to profile and
verify performance on-chip in real-time, instead of in simulation,
thus reducing design time.
This talk focuses on a system model we have developed where Systems
Integrate Modules with Predefined Physical Links (SIMPPL).  The model
represents computing systems as a network of Computing Elements (CEs)
interconnected with asynchronous queues.  The strength of the SIMPPL
model is the CE abstraction, which allows designers to decouple the
functionality of a module from system-level communication and control
via a programmable controller.  This system model reduces design time
by facilitating design reuse, system integration, and system
verification.

Lesley Shannon received a B.Sc. in Electrical Engineering from the
University of New Brunswick in 1999 and her M.A.Sc. from the
University of Toronto in 2001. Currently, she is doctoral candidate at
the University of Toronto, working with Dr. Paul Chow.  Her research
interests include system design methodologies; alternative computing
architectures such as reconfigurable computing, embedded computing,
and meta-computing; programming models and environments; and on-chip
CAD tools.