COLLOQUIUM Department of Computer Science and Engineering University of South Carolina Minimal Subset Evaluation: Rapid Warm-up for Simulated Hardware State John Williams Haskins, Jr. Department of Computer Science University of Virginia Date: February 22, 2002 (Friday) Time: 4:00-5:00PM Place: Swearingen Faculty Lounge (SWGN 1A03) Abstract The Minimal Subset Evaluation (MSE) technique is presented as a way to reduce time spent on large-structure warm-up during the fast-forwarding portion of microprocessor simulations. Warm up is commonly used prior to full-detail simulation to avoid cold- start bias in large on-chip structures like caches and branch predictors. Unfortunately, warm up can be very time consuming, often representing 50% or more of total simulation time. Previous techniques have used the entire fast-forward interval to obtain accurate warm up, which may be prohibitive for large parameter-space searches, or chosen a short but ad-hoc warm-up length that reduces simulation time but may sacrifice accuracy. MSE uses combinatorics to determine---with user-specified probability of accuracy---a minimally sufficient fraction of contiguous fast-forward instructions that must be executed for warm up to accurately produce state as it would have appeared had the entire fast-forward interval been used for warm up. For instance, only the most recent memory references' cache transactions need to be modeled to yield simulated cache state identical to the state that would have resulted had all memory references been modeled. By modeling fewer memory references' cache transactions, simulation running time is significantly reduced.My presentation motivates the MSE technique by describing its mathematical underpinnings and demonstrating its effectiveness for both single-large- sample and multiple-sample simulation styles. In preliminary experiments, MSE yields errors of less than 1% in IPC measurements with cycle-accurate simulation, while reducing simulation times by an average factor of two or more. John Haskins, Jr. is pursuing his doctorate at the University of Virginia Department of Computer Science where he earned his MCS in 2000. He earned his BS in computer science from Georgia Tech in 1997. Between the conclusion of his undergraduate studies and the beginning of graduate studies, he worked as an adjunct research staff member at the IDA Center for Computing Sciences. His technical interests include computer architecture and operating systems.