Homework 15%, Exams(2) 30%, Project 50%, Class Participation 5%.

For more detailed information about the structure of this course, please read the Research Position Paper regarding how I conduct the course, which is an early treatment being prepared for a research paper (without literature survey). CSCE 491 White Paper (PDF).

In this course, we'll take on the design of digital systems for implementing the IEEE 802.11 wireless LAN protocol.  We'll focus on the MAC layer functionality, which controls the allocation of the wireless medium and the transmission of data across the wireless channel.

From my experience (and from my research into custom computing systems built using programmable logic devices), I believe that whole systems can be built out of custom logic models--without requiring the use of a microprocessor--and that the cost of building such a solution can be recouped in the initial project.  Microprocessor cores generally have a sizable royalty structure associated with them, and so cost--along with performance, power minimization, and form factor--become reasons for adopting custom logic, which can be delivered with the flexibility and designer productivity using programmable logic devices, namely FPGAs.

We'll be designing circuits for realizing the 802.11 MAC protocol in programmable logic.  What you will start with when you come in the door will be your experience in digital logic design from CSCE 211, and your knowledge of computer architecture from CSCE 212.  In addition, your experience in algorithms and what you may have gained from any computer networking courses taken will be of benefit.  But everything else you will need to know to design systems using wireless networking you will learn in this class.  We will use the high-level graphical methods for depicting our design, namely the Algorithmic State Machine (ASM) method.  The specifications will be discussed using UML models of the WLAN protocol--from which we will derive suitable systems architectures for our circuit design activities.

The design method I teach for realizing high-productivity design and architecture analysis for programmable logic design is and integral part of this course.  I also teach this in CSCE 611, the course on Digital Systems Design.  Just as in that class, I will be collecting designer productivity data and effort distribution data for all homework assignments and project assignments in this course to compare against data sets I've collected  in previous semesters.

Course Objectives

The overall objectives of the 491 project experience will be for you to learn to carry out the following engineering design and analysis activities:

(1) Create a digital systems architecture and functioning synthesizable and simulatable model for a subset of the 802.11 MAC Layer protocol that supports a portion of this WiFi WLAN standard, namely, the ad-hoc station operation in DCF mode. The description of this protocol is contained in the Gast text, which is our primary reference. I will also provide a set of CSCE 491 lecture notes we will be working from in the class.

(2) Verify the correctness of the behavior of your digital systems model, in that it conforms to the protocol standard, by using simulation according to a set of test scenarios that you will develop and collect verification data substantiating the functionality and cycle-level timing of the model.

(3) Subject the verified model to a set of simulation experiments, in terms of evaluating its throughput and performance.  The model you create should be architected such that it will support a nominal bit transmission rate of up to 56 megabits per second, the rated transmission speed for the new 802.11g standard. Actually, we should be able to create a MAC model that runs many times faster than this rate, and the limiting factor of the network performance will be the transmission medium (i.e., the air). But we'll plot the data throughput for the various frame operations and data frame sizes supported by the standard.

The course outline is as follows:

1. Overview of the Digital Systems Design process.  Davis, Chapter 1.

2. Review of gate-level and register level design components.  Davis, Chapter 2.

3. Design of systems using the Algorithmic State Machine (ASM) method.  Davis, Chapter 3.

     4.1 Representation of combinational logic; data path elements.

     4.2 Representation of synchronous sequential logic; finite state machine styles, encoding, mapping to device structures.

     4.3 Conventions for expressing circuits and systems using the ASM methodology.

5. The IEEE 802.11 Wireless LAN (WiFi) standard.  Davis, Chapters 5-7, Gast, Chapters 1-4.

     5.1 802.11 Protocol, timing and architecture.

     5.2 Detailed module-level design of MAC Layer Receiver.

     5.3 Detailed module-level design of MAC Layer Transmitter.

I have posted the lecture notes for each week in both 2-page and 3-page-with-notespace PDF formats.  You can print whichever suits you.  The 3-page per sheet is the PowerPoint format that gives you space to write notes  beside each slide.

All design assignment deliverables must be completed according the Assignment Submission Guidelines.  Please follow these when preparing assignment submissions.

Here are the examples which are good sample problems for studying for the exam.  (1) Tail Light Controller problem (PDF), (2) Tail Light Controller solutions (mine) (PDF), (3) Vending Machine Controller problem (PDF), (4) Vending Machine solution-sequence diagram (PDF), (5) Vending Machine solution-ASM chart (PDF).  Note that the scope of problem on exam #1 will be more like the Tail Light controller, but I've included the Vending Machine because it is such a good example.