CSCE 491

Capstone Computer Engineering Design Project

Fall 2004 - Syllabus & Course Text

Course Description:  In this course, we will complete a design project involving the analysis, architecture, design and implementation of a VLSI circuit for the 802.11b "WiFi" MAC Layer protocol.  Wireless, Ad hoc networking is becoming an important component in the new "tetherless" economy.  You can go into a Starbucks in many cities around the world and--using your laptop or PDA--access the resources of the web.  The technology that makes this possible is that associated with the protocol and architecture of the IEEE 802.11b standard.  We will spend this semester learning the protocol and basic architecture, and we will analyze the architecture so that we may create a system design allowing us to create digital circuits that implement the MAC Layer of the 802.11b protocol.

We will use several analysis and design notations, methods and tools to carry out this activity.  First, we will use the Unified Modeling Language (UML) as the basis for creating analysis models and refined architecture models of the various functional elements of the 802.11b protocol and its architecture.  UML provides a number of graphical notations, and a means to economically represent the relevant aspects of the protocol.  We will use UML as the language in which we will explore architecture tradeoffs, and as a means of insuring that we have a reasonably complete design description of the 802.11 specification--for those functions on which we will concentrate, namely, the 4-frame protocol for requesting to send a frame (RTS), clearing a remote station to send a frame (CTS), actually sending the data (Data), and acknowledging that the frame was correctly received and processed (ACK).  All of the salient aspects of this process can be--and will be--modeled in UML.  In previous semesters, I have spent considerable time on this aspect of the course.  However, this semester, we will not focus on you, the students, creating your models.  Rather, we will focus on specification models I have created in the past, and use these as the basic for devising an architecture for our logic circuit.

We will spend most of our lecture and project time in this class focusing on the Algorithmic State Machine (ASM) methodology and notation, which is used in the specification, analysis, architecture and design of complex digital logic systems.  In CSCE 211, you used K-Maps, Bubble charts, and Boolean equations as a means to describe combinational and sequential circuits to do trivial functions.  Now, we will build on this knowledge from 211, along with  notions of computer architecture from CSCE 212, and bring a design method to bear on the problem of creating a design solution for the 802.11 MAC that meets the defined design constraints.  The ASM methodology is also a graphical notation, and has similar symbols to some of the UML notations.  However, it goes further into the realm of digital systems design, in that we can specify the behavior of our design model by constructing a description of the various concurrent components in terms of a set of interacting ASM diagrams (which basically look like flow charts).  ASM Charts explicitly represent the state machine nature of a given block's behavior, allowing us to describe the inputs, outputs (Moore and Mealy), present and next states precisely, using the ASM notation.  In addition, our method of using the ASM incorporates a patented approach involving specification of the data path operations in addition to the assertion of control signals.  So, our use of the ASM notation will seamlessly incorporate both the control and the data path elements of a block's functionality into a single, unified graphical description.

We will explore a number of different aspects of the 802.11 design using the ASM diagrammatic representation of the architecture that we will have explored in the source UML diagrams.  The class will be divided into teams of 3-4 students, and each team will create its design solution over the course of the semester.  I will teach you what to design and I will teach you how to design, and by the end of the semester, you will be able to actually go out and do design work in an application area that is both "hot" and has a lot of job opportunities.  You will have done this activity in a team of your peers, and will have demonstrated your design solution.  We will analyze the design space, create design models, then verify these models through the use of a tool set called Nimbus(TM), which runs on the Sun machines.  In addition, we'll use tools that allow synthesis of the logic circuits and those that perform layout onto a programmable logic device.  These will be the Synopsys FPGA Compiler-II(R) and the Xilinx(R) ISE tools.

Instructor:             Dr. James P. Davis, Associate Professor

                              Department of Computer Science and Engineering

                              College of Engineering and Information Technology

                              University of South Carolina, Columbia, SC 29208

                              Phone:  (803) 777-5855   Email: "jimdavis" at "cse.sc.edu"

Office Hours:         MW 3:00 – 5:00; Tues 1:30 – 2:00.  Scheduled by email appointment.

Time:                     MWF 11:15 – 12:05PM   (Room 2A22, Swearingen)

Grading Policy:     Homework & Pop Quizzes:  15%,  Examinations: (Two exams) 30%,  Design Project:  50%, Attendance & class participation: 5%

Note the composition of the grade:  I will not have students sign up for my classes, then opt to not attend my lectures and participate in the class.  This has become a problem in some of my classes, in that (1) University Policy about attendance is clear (check it out on www.sc.edu), (2) you are taking up space in the class, in terms of a scarce slot, that could be better used by students who are interested in attending the lectures, and (3) if I have to prepare for class, then you need to prepare and attend as well.  NOTE: University policy states that excessive absences from a class can result in the loss of a letter grade, at the discretion of the instructor.  I will be checking who is coming and who isn't.  If you can't make my class for some specific reason, then you had better make arrangements with me at the beginning of the semester, and/or you need to have a doctor's excuse.  Note that I will also be using Pop Quizzes as a means to see who is staying up with the class, and who is attending.  It's like this....I know everyone gets busy, but you *will* stay up with the material in my class, and you will attend my class.  Stay with it, or don't take the course, or be prepared to pay your Karmic debt.

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