Talks and Posters

Recent Presentation Slides

Trends in the Infrastructure of Computing (CSCE 190 talk), Nov. 14, 2011

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FCCM 2011 talk: A Sparse Matrix Personality for the Convey HC-1

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EPSCoR Workshop at USC for Desktop to Teragrid Project, Apr. 14, 2011: Heterogeneous Computing at USC

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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Feb. 1, 2011

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Heterogeneous Computing: New Directions for Efficient and Scalable High-Performance Computing, Dec. 3, 2009

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EPSCoR Workshop at Clemson for Desktop to Teragrid Project, Sept. 21, 2010: Heterogeneous Computing at USC

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Seven Minute Madness, Sept. 10, 2010: Heterogeneous Computing

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Heterogeneous Computing: New Directions for Efficient and Scalable High-Performance Computing, Apr. 2, 2009

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An Integrated Reduction Technique for a Double Precision Accumulator (HPRCTA09 talk), Nov. 15, 2009

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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Nov. 9, 2009

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Seven Minute Madness, Sept. 11, 2009: Heterogeneous Computing

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Heterogeneous Computing (REU Orientation talk), June 1, 2009

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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Apr. 13, 2009

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Seven Minute Madness, Sept. 12, 2008: Reconfigurable Computing

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Reconfigurable Computing in Undergraduate Education, UNC-Charlotte, May 9, 2008

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Integrated Circuit Design and Fabrication (high school ELE talk), Apr. 18 and 25, 2008

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High-Performance Reconfigurable Computing for Genome Analysis (invited talk at UNC-Charlotte), Mar. 28, 2008

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Trends in the Infrastructure of Computing: Processing, Storage, Bandwidth (CSCE 190 talk), Nov. 5, 2007

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IEEE International Conference on Bioinformatics and Bioengineering (BIBE 2007), October 14, 2007

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Seven Minute Madness, Sept. 14, 2007: Reconfigurable Computing

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IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007), April 23, 2007

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Seven Minute Madness, Sept. 8, 2006: Special-Purpose Parallel Architectures

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Reconstructing Phylogenies from Gene-Order Data

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Current Research Overview

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Predictive Load Balancing for Interconnected FPGAs

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Talk on Direct Networks

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Older Presentation Slides

Lightweight Hierarchical Error Control Codes for Multi-Bit Differential Channels

Ph.D. defense talk: [ppt]
Ph.D. proposal talk: [ppt]
Competition talk: [ppt]

MIPS Instruction Set Architecture

Undergraduate architecture lecture
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Next-Generation Interconnection Technology for High-Performance Computer Systems

Research summary talk
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Multi-Bit Differential Signaling Prototype Chip

DAC2004 research competition presentation
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Optoelectronic Multi-Chip Module Demonstrator System

Optics in Computing 2003 talk
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Research Plan

My old research plan circa March 2005
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Posters

Heterogeneous and Reconfigurable Computing Group (SC09)

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Exploiting Symmetry to Speed Up FPGA Accelerated Conjugate Gradient (FCCM09)

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Aggressive Network Interface And Router Designs For Special Purpose Scalable Distributed Processing Systems (Student Shaun Gause), USC Discovery Day 2007

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Predictive Load Balancing for Interconnected FPGAs

FPL2006
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Area, Power, and Pin Efficient Bus Transceiver Using Multi-Bit-Differential Signaling

ISCAS2005
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Multi-Bit Differential Signaling (MBDS) for Next Generation Off-Chip Interconnect

DAC2004
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Next Generation High Speed Board-Level Interconnect Using Fixed-Load Drivers

CS Department
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Optoelectronic Multi-Chip Modules

OC2003
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Optoelectronic Multi-Chip Module Demonstration System Using Fiber Image Guide Interconnections

CS Department
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