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CSCE 613: Fundamentals of VLSI Chip Design

Schedule Code: 545256

Meeting Times: Monday, Wednesday, Friday 12:20 - 1:10 (subject to change pending student consensus)

Location: Swearingen 2A15 (lecture), 1D43 (lab)

Instructor: Dr. Jason D. Bakos

Textbook: CMOS VLSI Design: A Circuits and Systems Perspective (3rd edition) by Neil H.E. Weste, David Harris, Pub: Addison Wesley (ISBN: 0321149017)

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[USC Bookstore]

Announcements

11/06/06

In order to resolve the issue we are having with our scripts not running, please modify your ".login" file if your current shell is [/bin/tsch]. Here is the functional ".login":

	
		if (-e /usr/local/3rdparty/cad_setup_files/cadence.csh) then
  		  source /usr/local/3rdparty/cad_setup_files/cadence.csh
  		  source /usr/local/3rdparty/cad_setup_files/synopsys.csh
  		  source /usr/local/3rdparty/cad_setup_files/mentor.csh
		else
  		  source /usr/local/etc/cad_setup_files/cadence.csh
		endif
		

Also, in order to get the abstract generator to execute properly we need to do the following:

		Before logging into a solaris machine with ssh, we must run:
		   
		   xhost +
		
		Now we may log into the solaris machine with ssh.  Within the 
		solaris terminal, we must set the DISPLAY environment to point
		to the PC we are currently sitting at with the following command:

		   setenv DISPLAY computername.cse.sc.edu:0   
		                        (ie, circe.cse.sc.edu:0)
		   
		Now run abstract.
		

Downloads

Course syllabus: Pdf document[pdf]

Course description: Pdf document[pdf]

Outcomes document: Pdf document[pdf]

Outcomes talk: Ppt document[ppt]

Lectures

Introduction lecture: Pdf document[ppt]

Chapter 1: Pdf document[ppt]

Chapter 2: Pdf document[ppt]

VHDL lecture: Pdf document[ppt]

Labs

Lab 1: Estimation of Logic Speed in the AMI C5N Process Pdf document[pdf]

Lab 2: Characterization of AMI C5N Devices Part 1 Pdf document[pdf]

Lab 3: Characterization of AMI C5N Devices Part 2 Pdf document[pdf]

Lab 4: Characterization of AMI C5N Devices Part 3 Pdf document[pdf]

Lab 5: Development and Simulation of Full Standard Cell Library Pdf document[pdf]

Lab 6: Course Project: Design, Verification, and Layout of Accumulator-Based ALU Pdf document[pdf]

Tutorials

Tutorial 0: Setting up the tools HTML document[html]

Tutorial 1 (Cadence IC-Tools): Schematic entry and simulationHTML document[html]

Tutorial 2 (Cadence IC-Tools): Layout, DRC, extraction, LVS, layout simulationHTML document[html]

Tutorial 3 (Cadence IC-Tools): Preparation of standard cell libraryHTML document[html]

Tutorial 4 (Cadence SignalStorm): Library characterizationHTML document[html]

Tutorial 5 (Cadence SignalStorm): Using SignalStorm in distributed modeHTML document[html]

Tutorial 6 (Cadence Abstract Generator): Cell abstract generationHTML document[html]

Tutorial 7 (Mentor HDL Designer): Behavioral design of 32-bit adder datapathHTML document[html]

Tutorial 8 (Synopsys Design Analyzer): Synthesis of 32-bit adder datapathHTML document[html]

Tutorial 9 (Cadence First Encounter): Place-and-route of 32-bit adder datapathHTML document[html]

Links

VHDL mini-reference

MOSIS

MOSIS Wikipedia entry

Intel fabrication tutorial

Mentor Graphics

Synopsys

Cadence Design Systems

Textbook website

CHIP-TALK: A helpful website for EDA

Cadence CRETE: A helpful website for students

DEEP-CHIP: An EDA industry website

Oklahoma State standard cells page for AMI .5um process

NCSU Cadence Design Kit

Course Schedule

Date Activity Assignment Location Downloads
Fri, 8/25/06 Introductory lecture none 2A15 slides Pdf document[ppt]
Mon, 8/28/06 Chapter 1 lecture Read 1.1-1.5.5, Exercises 1.3, 1.4, 1.5, 1.6, 1.7, 1.16(a), 1.17, due 9/6 2A15 slides Pdf document[ppt]
Wed, 8/30/06 Chapter 1 lecture none 2A15 none
Mon, 9/4/06 No class (Labor Day) none n/a none
Wed, 9/6/06 Chapter 2 lecture none 2A15 slides Pdf document[ppt]
Mon, 9/11/06 Chapter 2 lecture Read 2.1-2.3.3, 2.4-2.4.9, 2.6, due 9/18 2A15 none
Wed, 9/13/06 Work on IC-Tools tutorials none 1D43 none
Mon, 9/18/06 Work on IC-Tools tutorials none 1D43 none
Mon, 9/18/06 Work on IC-Tools tutorials none 1D43 none
Wed, 9/20/06 Work on Lab 1 Lab 1, due 9/27 1D43 Lab 1 Pdf document[pdf]
Mon, 9/25/06 Work on Labs 1/2 Lab 2, due 10/2 1D43 Lab 2 Pdf document[pdf]
Wed, 9/27/06 Work on Labs 2/3 Labs 3/4, due 10/4 1D43 Lab 3 Pdf document[pdf] Lab 4 Pdf document[pdf]
Mon, 10/2/06 Work on Labs 3/4 Lab 5, due 10/20 1D43 Lab 5 Pdf document[pdf]
Wed, 10/4/06 Work on Labs 3/4 none 1D43 none
Mon, 10/9/06 Work on Lab 4 none 1D43 none
Wed, 10/11/06 Work on Lab 4 none 1D43 none
Mon, 10/16/06 Work on Lab 4 none 1D43 none
Wed, 10/18/06 Work on Lab 4 none 1D43 none
Mon, 10/23/06 VHDL Lecture none 2A15 slides Pdf document[ppt]
Wed, 10/25/06 HDL Designer/ First Encounter tutorials none 1D43 none
Mon, 10/30/06 HDL Designer/ First Encounter tutorials none 1D43 none
Wed, 11/1/06 HDL Designer/ First Encounter tutorials none 1D43 none
Mon, 11/6/06 Work on Lab 6 Lab 6, due finals week 1D43 Lab 6 Pdf document[pdf]
Wed, 11/8/06-finals week Work on Lab 6 none 1D43 none