MIPS Instruction Set Architecture

• Arithmetic Operations: add, addi, addiu, addu, sub, subu, mult, multu
• Logic Operations: and, andi, nor, or, ori, xor, xori
• Shift Operations: sll, sra, srl
• Miscellaneous Immediate Instructions: lui
• Comparison Instructions: slt, sltu, slti
• Load/Store Instructions: lw, sw
• Branch Instructions: beq, bne, bgez
• Jump Instructions: j, jal, jr
• Register Movement Instructions: mfhi, mflo
• Miscellaneous Instructions: nop

Register Arithmetic Operations:

add rd, rs, rt :

Puts the sum of the integers in the register rs and the register rt into register rd and checks for overflow.

addu rd, rs, rt :

Puts the sum of the integers in the register rs and the register rt into register rd and does not check for overflow.

sub rd, rs, rt :

Subtracts the integer in register rt from the integer in register rs, putting the result into register rd and checks for overflow.

subu rd, rs, rt :

Subtracts the integer in register rt from the integer in register rs, putting the result into register rd and does not check for overflow.

mult rs, rt :

Multiplies the signed integers in registers rs and rt. Leave the low-order word of the product in register lo and the high-order word in register hi.

multu rs, rt :

Multiplies the unsigned integers in registers rs and rt. Leave the low-order word of the product in register lo and the high-order word in register hi.

Register Logic Operations:

and rd, rs, rt :

Puts the logical AND of the integers from register rs and rt into register rd.

or rd, rs, rt :

Puts the logical OR of the integers from register rs and rt into register rd.

xor rd, rs, rt :

Puts the logical XOR of the integers from register rs and rt into register rd.

nor rd, rs, rt :

Puts the logical NOR of the integers from register rs and rt into register rd.

Register Shift Operations:

sll rd, rt, shamt :

Performs logical shift of contents of register rt left by shamt bits, putting results into register rd.  Vacated bits are filled with 0's.

srl rd, rt, shamt :

Performs logical shift of contents of register rt right by shamt bits, putting results into register rd.  Vacated bits are filled with 0's.

sra rd, rt, shamt :

Performs aritmetic shift of contents of register rt right by shamt bits, putting results into register rd.  Vacated bits are filled with replicas of sign bit.

Miscellaneous Immediate Instructions:

lui rt, imm :

Load the immediate value imm into the upper half-word of register rt. The lower bits of the resgister are set to 0.

Register Comparison Operations:

slt rd, rs, rt :

If the signed integer in register rs is less than the signed integer in register rt then store the value 0x00000001 in register rd, otherwise store the value 0x00000000 there.

sltu rd, rs, rt :

If the unsigned integer in register rs is less than the unsigned integer in register rt then store the value 0x00000001 in register rd, otherwise store the value 0x00000000 there.

Immediate Arithmetic Operations:

addi rt, rs, imm :

Put the sum of the integer in register rs and the sign extended immediate value imm into the register rt and check for overflow.

addiu rt, rs, imm :

Put the sum of the integer in register rs and the sign extended immediate value imm into the register rt and do not check for overflow.

Immediate Logic Operations:

andi rt, rs, imm :

Put the logical AND of the value in the register rs and the zero extended immediate value imm into register rt.

ori rt, rs, imm :

Put the logical OR of the value in the register rs and the zero extended immediate value imm into register rt.

xori rt, rs, imm :

Put the logical XOR of the value in the register rs and the zero extended immediate value imm into register rt.

Immediate Comparison Operations:

slti rt, rs, imm :

If the signed integer in register rs is less than the sign extended immediate imm then store the value 0x00000001 in register rt, otherwise store the value 0x00000000 there.

Load and Store Operations:

lw rt, Offset(rs) :

Get word at address = Offset(rs) = rs + Offset and load it into register rt. The word must be aligned, meaning the address must be evenly divisible by four.

sw rt, Offset(rs) :

Store the word from register rt at address = Offset(rs) = rs + Offset.

Branch Operations:

beq rs, rt, label : (label is transated to a 16 bit Offset by the assembler)

If the integer in register rs is equal to the integer in register rt, then increment the program counter (PC) by Offset * 4.

bne rs, rt, label : (label is transated to a 16 bit Offset by the assembler)

If the integer in register rs is not equal to the integer in register rt, then increment the program counter (PC) by Offset * 4.

bgez rs, label : (label is transated to a 16 bit Offset by the assembler)

If the integer in register rs is greater than or equal to zero, then increment the PC by Offset * 4.