Meeting Times: TTH 11:00 - 12:15
Location: Swearingen 1D39
Instructor: Dr. Jason D. Bakos
Textbook: Digital Design and Computer Architecture
MIPS Reference Card:
[pdf]
Course syllabus:
[pdf]
DE2 User Manual
[pdf]
simpletest.s:
[asm]
simpletest.lst:
[lst]
simpletest_div4.lst:
[lst]
simpletest.s (GRADUATE STUDENTS):
[asm]
simpletest.lst (GRADUATE STUDENTS):
[lst]
simpletest_grad_div4.lst (GRADUATE STUDENTS):
[lst]
Example final exam:
[pdf]
MIPS Instruction Set Architecture detail [html]
MIPS Instruction Set Architecture types [html]
MARS [html]
Blackboard [html]
CSE Dropbox [html]
Lecture 1: Introduction to Behavioral Logic Design
[ppt]
[pdf]
Lecture 2: Design of a 32-bit ALU
[ppt]
[pdf]
Lecture 3: Timing Simulation and FPGA Verification of ALU
[ppt]
[pdf]
Lecture 4: Sequential Logic and Finite State Machine Controllers
[ppt]
[pdf]
Lecture 5: Designing a CPU
[ppt]
[pdf]
Lecture 6: Programmed I/O and Video Memory
[ppt]
[pdf]
Lab 1: ALU and Testbench Design
[pdf]
[table]
Lab 2: ALU: Post Place and Route Simulation
[pdf]
[table]
Lab 3: ALU: FPGA Verification
[pdf]
Lab 3b: Design of an Unsigned Integer Multiplier/Divider
[pdf]
Lab 4: Pipelined CPU Design
[pdf]
Lab 6 Notes: MyComputer Synthesis Notes
[pdf]
Lab 6 Notes: Progammed I/O and Video Memory
[pdf]
Tutorial 1: Getting Started... [pdf]
Tutorial 2: Creating Libraries [pdf]
Tutorial 3: Top-Level ALU Block Diagram [pdf]
Tutorial 4: Adding Sub-Blocks to the ALU [pdf]
Tutorial 5: Creating the Logical Sub-Block [pdf]
Tutorial 6: Simulating the Logical Sub-Block [pdf]
Tutorial 7: Creating the Shifter Sub-Block [pdf]
Tutorial 8: Simulating the Shifter Sub-Block [pdf]
Tutorial 9: Creating the Arithmetic Sub-Block [pdf]
Tutorial 10: Creating the Comparison Sub-Block [pdf]
Tutorial 11: Creating the Mux4Bus32 Sub-Block [pdf]
Tutorial 12: Creating the ALU Test Bench [pdf]
Tutorial 13: Post-Place and Route Simulation [pdf]
Tutorial 14: FPGA Verification of ALU [pdf]
Tutorial 14a: Finite State Machine Design [pdf]
Tutorial 15: Getting Started with the CPU Design [pdf]
Tutorial 16: Generating MIF Files and Implementing Instructions [pdf]
Tutorial 17: Initializing FPGA Memories After Design Implementation [pdf]
WISHBONE Bus Specification [html]
VHDL Quick Start [ppt]
MIPS32 Architecture For Programmers Volume I[pdf]
MIPS32 Architecture For Programmers Volume II[pdf]
MIPS32 Architecture For Programmers Volume III[pdf]
SPIM: A MIPS32 Simulator [html]
SPIM: Quick References [html]
Assemblers, Linkers, and the SPIM Simulator - by James R. Larus [pdf]