CSCE 612: VLSI SYSTEM DESIGN
Catalog Description:
612—VLSI
System Design.
(3) (Prereq: CSCE 211, 245) VLSI system design process models, introduction to
EDA tools, HDL, modeling and simulation, logic synthesis and simulation,
benchmark design projects.
Prerequisite(s) By Topic:
Digital logic
Programming in a high level language
Textbook(s) and Other
Required Material:
A VHDL
Synthesis Primer, J. Bhasker, Star Galaxy Publishing, 1998.
Computing Platform: Windows 2000
Course Objectives: {Assessment Methods Shown in
Braces}
1. Model, simulate and synthesize digital systems using
HDL support tools HDL modeling and simulation {tests, homework, project}
2. Describe the most used synthesis tools {tests}
3. Design, synthesize and optimize the logic for a set
of functions {tests, homework, project}
4. Complete a significant VLSI design project {project}
Topics Covered:
1. Introduction to synthesis
2. Mapping statements to gates
3. State machines
4. Model optimizations
5. Design verification
6. Modeling hardware elements for synthesis
Laboratory Projects
A major VLSI design project
Syllabus
Flexibility: High. Choice of textbook
and design project determined by instructor
Relationship of Course to
Program Outcomes:
The contribution of each course objective to meeting
the program outcomes is indicated with the scale:
3 = major contributor, 2 = moderate contributor, 1 = minor contributor. Blank if not related.
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Program Outcomes |
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1.
Logic & Math |
2.
Computing Fundamentals |
3.
Apply Computing Principles |
4.
Work on teams |
5.
Communicate Effectively |
6.
Liberal arts & Soc. Sciences |
7.
Basic Science and Lab Procedures |
8.
Learn New Tools & Processes |
9.
Employed upon Graduation |
10.
Application Area |
11.
Electronics and Digital Sys Design |
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1. Model,
simulate and synthesize digital systems using HDL support tools HDL modeling
and simulation |
|
|
3 |
|
|
|
|
3 |
2 |
|
2 |
|
2. Describe
the most used synthesis tools |
|
|
3 |
|
|
|
|
2 |
1 |
|
1 |
|
3. Design,
synthesize and optimize the logic for a set of functions |
|
|
3 |
|
|
|
|
|
1 |
|
2 |
|
4.
Complete a significant VLSI design project |
|
|
|
|
|
|
|
|
2 |
|
2 |
Estimated CSAB Category
Content:
Algorithms: 0
Data Structures: 0
Software Design: 1
Concepts of
Programming Languages 0
Organization and
Architecture 2
hr
Oral and Written
Communication:
Documentation for major VLSI design
project
Social and
Ethical Issues: none
Theoretical
Content: none
Analysis and
Design:
Significant VLSI design project
Class/Laboratory Schedule:
Lecture: 3
periods of 50 minutes or 2 periods of 75 minutes per week
Difference between
Undergraduate and Graduate Work:
Students
enrolled for graduate credit are required to complete a more difficult project
than undergraduates in order to justify the receipt of graduate credit for this
course.
Course
Coordinator: John Bowles
Modification and
Approval History:
Initial description, March 22, 1999
Revised, June 2001
Modified July 2002 to include statement
on graduate work